/*************************************************
* CHIPSEA F61 FRAMEWORK
* Copyright(c) 2018, NewDegreeTechnology, Inc.
**************************************************/

//#include "hal_ndt_common.h"

//#ifdef CS_F61

#ifndef HAL_CS_F70_FRAMEWORK_H
#define HAL_CS_F70_FRAMEWORK_H

///////////////////////////////////////////////////////////////////////////////////////////////////

/* Defien CHIPSEA F61 Parameter */

/* The parameter of DATA TABLE */
#define MD_COUNT			8
#define GA_COUNT			2
#define RST_SRC_COUNT       4
///////////////////////////////////////////////////////////////////////////////

/* The parameter of CPU */
#define CPU_PLL_BP                      0
#define CPU_PLL_OE                      0
#define CPU_PLL_SRC                     1
#define CPU_PLL_INDV                    PLL_INDIV_6
#define CPU_PLL_OUTDV                   PLL_OUTDIV_4
#define CPU_PLL_FBDV                    PLL_FBDIV_36

///////////////////////////////////////////////////////////////////////////////

/* The parameter of UART */
#define UART_BAUDRATE                   BaudRate_115200
#define UART_PARITY                     UART_Parity_No;
#define UART_WORDLENGTH                 UART_WordLength_8bit;
#define UART_STOPBITS                   UART_StopBit_1;

#define UART_FIFO_ENABLE                ENABLE;
#define UART_FIFO_RCVR                  FIFO_OneData;
#define UART_RIE_ENABLE                 DISABLE;

///////////////////////////////////////////////////////////////////////////////

/* The parameter of TIMER */
#define TIMER0_INTEN                    ENABLE
#define TIMER0_COUNTMODE                Timer_CountMode_Peroid
#define TIMER0_PRESCALE                 9
#define TIMER0_TCMP                     10

#define TIMER1_TCMP			4000

///////////////////////////////////////////////////////////////////////////////

/* The parameter of DELAY */
#define DELAY_SYSTICK_IEENABLE          DISABLE
#define DELAY_SYSTICK_RELOAD            10      //1ms

///////////////////////////////////////////////////////////////////////////////

/* The parameter of WDT */
#define WDT_PERIODTIME                  WDT_PeriodTime_2q16     //16384 * 0.1 ms ???1.6s
#define WDT_INT_ENABLE                  ENABLE
#define WDT_RESYSTEM_ENABLE             ENABLE                  //wdt 超时复位
//#define WDT_INT_WAKEUP_ENABLE         DISABLE                 //wdt 中断唤醒
#define WDT_DELAY_TIME                  WDT_DelayTime_130CLK
#define WDT_ENABLE                      ENABLE

#define MCU_TM0_REG_VAL (st_sys_ctr.period)

#ifndef BUILD_SW_ONLY

///////////////////////////////////////////////////////////////////////////////////////////////////

/* CHIPSEA F61 Drivers */

#include "csa37f7x_sdk.h"


///////////////////////////////////////////////////////////////////////////////

/* CHIPSEA F61 HAL */
#include "hal_cs_f70_timer.h"
#include "hal_cs_f70_uart.h"
#include "hal_cs_f70_gpio.h"
#include "hal_cs_f70_delay.h"
#include "hal_cs_f70_wdt.h"
#include "hal_cs_f70_flash.h"
#include "hal_cs_f70_tempsensor.h"
#include "hal_cs_f70_afe.h"
#include "hal_cs_f70_sleep.h"
#include "hal_cs_f70_iic.h"
#include "hal_cs_f70_power.h"
#include "hal_cs_f70_reg.h"
#include "hal_cs_f70_flash_rw.h"

///////////////////////////////////////////////////////////////////////////////////////////////////

#endif

#endif  /* HAL_CS_F61_FRAMEWORK_H */

//#endif /* End of CS_F61 */

